At this year’s Xen Developer and Design Summit, Stefano Stabellini from Xilinx gave a talk on Cache Coloring, a new feature for Xen that helps better support real-time workloads.
Many embedded deployments require deterministic IRQ latency, which can be difficult to pull off as even small spikes lead to failure. No matter the activity in other VMs, the latency-sensitive app has to continue unaffected.
Xen can fully dedicate physical CPUs to VMs to minimize latency and interference, however, real-time deadlines can still be missed due to the presence of a shared L2 cache across the ARM cores. One app on one CPU core can affect the performance of another app in a different VM by causing cache interference.
The solution is cache coloring. In this talk, Stefano introduces this new Xen feature to achieve deterministic latency on ARM systems. The feature enables memory allocations with entirely dedicated cache line entries. The presentation shows how to configure a cache coloring Xen deployment and demonstrates its benefits with detailed latency measurements and live demos.
Check out the video here: